Projeto do sistema de comunicação de um multicomputador

Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro TecnologicoA busca por sistemas de computação capazes de atingir elevadas performances de processamento tem levado os pesquisadores e cientistas a propor e desenvolver diferentes modelos de arquiteturas de computadores de alto desempenho. O Projeto Nó// (lê-se nó paralelo), do qual participam grupos de pesquisa das Universidades Federais de Santa Catarina e do Rio Grande do Sul, também insere-se nesse contexto. Esse projeto visa o desenvolvimento de um ambiente completo para programação paralela, incluindo a construção de um multicomputador com rede de interconexão dinâmica. O presente trabalho vem colaborar com a concepção desse multicomputador, através do projeto do sistema de comunicação necessário à interação entre os processadores da máquina

Segurança em Redes-em-Chip: Conceitos e Revisão do Estado da Arte

As Redes-em-Chip foram propostas para atender às necessidades de escalabilidade de comunicação em sistemas computacionais integrados em um único chip. Assim como sistemas distribuídos tradicionais, um sistema integrado e sua rede são suscetíveis a ataques às suas propriedades de segurança. Este artigo apresenta um levantamento bibliográfico realizado para caracterizar quais técnicas têm sido utilizadas para prover segurança em sistemas integrados baseados em Redes-em-Chip. Os trabalhos foram classificados quanto ao tipo de ataque, a propriedade de segurança afetada, o mecanismo de segurança utilizado e o componente adotado. O artigo identifica os ataques e as propriedades mais abordados por esses trabalhos, bem como os principais mecanismos de segurança utilizados e os componentes nos quais eles são implementados

Delineamento Quase-Experimental para Avaliação de uma Abordagem Interdisciplinar no Ensino de Computação

The knowledge of computer architecture is essential for the formation of Computer Science students, helping them to understand the low level workings of the computer. In this sense, a family of processors and an integrated development environment have been used in different courses in a bachelor in Computer Science. This paper details a quasi-experimental design to be used for assess the implementation of this approach in disciplines of Computer Architecture and Organization and Compilers. It is intended to expand the evidence of improvement in learning obtained with the above-mentioned approach

Worst-Case Communication Time Analysis for On-Chip Networks with Finite Buffers

Network-on-Chip (NoC) is the ideal interconnection architecture for many-core systems due to its superior scalability and performance. An NoC must deliver critical messages from a realtime application within specific deadlines. A violation of this requirement may compromise the entire system operation. Therefore, a series of experiments considering worst-case scenarios must be conducted to verify if deadlines can be satisfied. However, simulation-based experiments are time-consuming, and one alternative is schedulability analysis. In this context, this work proposes a schedulability analysis to accelerate design space exploration in real-time applications on NoC-based systems. The proposed worstcase analysis estimates the maximum latency of traffic flows assuming direct and indirect blocking. Besides, we consider the size of buffers to reduce the analysis’ pessimism. We also present an extension of the analysis, including self-blocking. We conduct a series of experiments to evaluate the proposed analysis using a cycle-accurate simulator. The experimental results show that the proposed solution presents tighter results and runs four orders of magnitude faster than the simulation.N/

PRIPRO Privacy Profiles: User Profiling Management for Smart Environments

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A Review of Techniques for Implementing Elliptic Curve Point Multiplication on Hardware

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Hyperspectral Image Classification: An Analysis Employing CNN, LSTM, Transformer, and Attention Mechanism

Hyperspectral images contain tens to hundreds of bands, implying a high spectral resolution. This high spectral resolution allows for obtaining a precise signature of structures and compounds that make up the captured scene. Among the types of processing that may be applied to Hyperspectral Images, classification using machine learning models stands out. The classification process is one of the most relevant steps for this type of image. It can extract information using spatial and spectral information and spatial-spectral fusion. Artificial Neural Network models have been gaining prominence among existing classification techniques. They can be applied to data with one, two, or three dimensions. Given the above, this work evaluates Convolutional Neural Network models with one, two, and three dimensions to identify the impact of classifying Hyperspectral Images with different types of convolution. We also expand the comparison to Recurrent Neural Network models, Attention Mechanism, and the Transformer architecture. Furthermore, a novelty pre-processing method is proposed for the classification process to avoid generating data leaks between training, validation, and testing data. The results demonstrated that using 1 Dimension Convolutional Neural Network (1D-CNN), Long Short-Term Memory (LSTM), and Transformer architectures reduces memory consumption and sample processing time and maintain a satisfactory classification performance up to 99% accuracy on larger datasets. In addition, the Transfomer architecture can approach the 2D-CNN and 3D-CNN architectures in accuracy using only spectral information. The results also show that using two or three dimensions convolution layers improves accuracy at the cost of greater memory consumption and processing time per sample. Furthermore, the pre-processing methodology guarantees the disassociation of training and testing data.N/

Hybrid Impedance-Admittance Control for Upper Limb Exoskeleton Using Electromyography

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